HCPL-0601 Electronic IC Chips HCMOS Compatible , High CMR , 10 MBd Optocouplers
electronic integrated circuit
,linear integrated circuits
HCMOS Compatible, High CMR, 10 MBd Optocouplers
HCPL-261A HCPL-061A
HCPL-263A HCPL-063A
HCPL-261N HCPL-061N
HCPL-263N HCPL-063N
Features
• HCMOS/LSTTL/TTL Performance Compatible
• 1000 V/µs Minimum Common Mode Rejection (CMR) at VCM = 50 V (HCPL- 261A Family)
and 15 kV/µs Minimum CMR at VCM = 1000 V (HCPL-261N Family)
• High Speed: 10 MBd Typical
• AC and DC Performance Specified over Industrial Temperature Range -40°C to +85°C
• Available in 8 Pin DIP, SOIC-8 Packages
• Safety Approval
UL Recognized per UL1577
2500 V rms for 1 minute and 5000 V rms for 1 minute (Option 020)
CSA Approved VDE 0884 Approved with VIORM = 630 V peak for HCPL-261A/261N Option 060
Applications
• Low Input Current (3.0 mA) HCMOS Compatible Version of 6N137 Optocoupler
• Isolated Line Receiver
• Simplex/Multiplex Data Transmission
• Computer-Peripheral Interface
• Digital Isolation for A/D, D/A Conversion
• Switching Power Supplies
• Instrumentation Input/Output Isolation
• Ground Loop Elimination
• Pulse Transformer Replacement
Description
The HCPL-261A family of optically coupled gates shown on this data sheet provide all the benefits of the industry standard 6N137 family with the added benefit of HCMOS HCPL-261A HCPL-061A HCPL-263A HCPL-063A HCPL-261N HCPL-061N HCPL-263N HCPL-063N compatible input current. This allows direct interface to all common circuit topologies without additional LED buffer or drive components.
The AlGaAs LED used allows lower drive currents and reduces degradation by using the latest LED technology. On the single channel parts, an enable output allows the detector to be strobed. The output of the detector IC is an open collector schottkyclamped transistor. The internal shield provides a minimum common mode transient immunity of 1000 V/µs for the HCPL-261A family and 15000 V/µs for the HCPL-261N family.
Functional Diagram
Absolute Maximum Ratings
Parameter | Symbol | Min | Max | Units | Note |
---|---|---|---|---|---|
Storage Temperature | TS | -55 | 125 | °C | |
Operating Temperature | TA | -40 | +85 | °C | |
Average Input Current | IF(AVG) | 10 | mA | 1 | |
Reverse Input Voltage | VR | 3 | Volts | ||
Supply Voltage | VCC | -0.5 | 7 | Volts | 2 |
Enable Input Voltage | VE | -0.5 | 5.5 | Volts | |
Output Collector Current (Each Channel) | IO | 50 | mA | ||
Output Power Dissipation (Each Channel) | PO | 60 | mW | 3 | |
Output Voltage (Each channel) | VO | -0.5 | 7 | Volts | |
Lead Solder Temperature (Through Hole Parts Only) |
260°C for 10 s, 1.6 mm Below Seating Plane |
Notes:
1. Peaking circuits may be used which produce transient input currents up to 30 mA, 50 ns maximum pulse width, provided the average current does not exceed 10 mA.
2. 1 minute maximum.
3. Derate linearly above 80°C free-air temperature at a rate of 2.7 mW/°C for the SOIC-8 package.
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