TLP105(F) Electronic IC Chips PHOTOCOUPLER GaAâAs IRED & PHOTO-IC
electronic integrated circuit
,linear integrated circuits
TOSHIBA PHOTOCOUPLER GaAℓAs IRED & PHOTO-IC
TLP105
Isolated bus drivers
High-speed line receivers
Microprocessor system interfaces
The Toshiba TLP105 consists of a GaAℓAs light emitting diode optically coupled to a high-gain, high-speed photodetector.
The TLP105 is housed in a 6-pin MFSOP.
With a totem-pole output, the TLP105 is capable of both sinking and sourcing current.
The TLP105 has an internal Faraday shield, which provides a guaranteed common-mode transient immunity of ±10 kV/μs.
The TLP105 has a noninverting output. An inverting-output version, the TLP108, is also available.
• Buffer logic type (totem-pole output)
• Guaranteed Performance Over Temperature: -40 to 100°C
• Power Supply Voltage: 4.5 to 20 V
• Input Threshold Current: IFLH =1.6 mA (max)
• Switching Time (tpLH/tpHL): 250 ns (max)
• Common mode transient immunity: ±10 kV/μs
• Isolation Voltage: 3750 Vrms
Absolute Maximum Ratings (Ta = 25°C)
| CHARACTERISTIC | SYMBOL | RATING | UNIT | |
|---|---|---|---|---|
| LED | Forward Current | IF | 20 | mA |
| Peak Transient Forward Current (Note1) | IFPT | 1 | A | |
| Peak Transient Forward Current (Note1) | VR | 5 | V | |
| DETECTOR | Output Current 1 (Ta ≤ 25℃) | IO1 | 25/-15 | mA |
| Output Current 2 (Ta ≤ 100℃) | IO2 | 5/-5 | mA | |
| Peak Output Current (Note2) | IOP | 50/-50 | mA | |
| Output Voltage | VO | -0.5 to 20 | V | |
| Supply Voltage | VCC | -0.5 to 20 | V | |
| Operating Temperature Range | Topr | -40 to 100 | °C | |
| Operating Temperature Range | Tstg | -55 to 125 | °C | |
| Lead Solder Temperature (10s) | Tsol | 260 | °C | |
| Isolation Voltage (AC,1min.,R.H.≤ 60%,Ta=25°C) (Note3) | BVs | 3750 | Vrms | |
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Note 1: Pulse width ≤ 1μs, 300pps.
Note 2: Pulse width ≤ 5 μs, duty cycle ≤ 0.025
Note 3: Device considered a two terminal device: pins 1 and 3 shorted together and pins 4, 5 and 6 shorted together.
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