TLP550(F) intergrated Circuit Chip Line Receiver Feedback Control
TLP550 intergrated Circuit Chip Line Receiver Feedback Control
Digital Logic Isolation
Line Receiver Feedback Control Power Supply Control
Switching Power Supply
Transistor Inverter
TLP550 constructs a high emitting diode and a one chip photo diode− transistor.
TLP550 has no base connection, and is suitable for application at noisy environmental condition.
This unit is 8−lead DIP package.
Isolation voltage: 2500 Vrms (min.)
Switching speed: tpHL, tpLH = 0.5μs (typ.)(RL=1.9 kΩ)
TTL compatible
UL recognized: UL1577, file No. E67349
Current Transfer Ratio
| Classification |
Current Transfer Ratio (%) (IC/IF) |
Marking of Classification | |
| MIN | MAX | ||
| (None) | 10 | -- | Blank, O, Y |
| Rank O | 19 | -- | O |
| Rank Y | 35 | -- | Y |
Absolute Maximum Ratings (Ta = 25°C)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). (Note 1) Derate 0.8mA above 70°C. (Note 2) 50% duty cycle, 1ms pulse width. Derate 1.6mA / °C above 70°C. (Note 3) Pulse width 1μs, 300pps. (Note 4) Derate 0.9mW / °C above 70°C. (Note 5) Derate 2mW / °C above 70°C.
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