AT93C46DN-SH-B Three-wire Serial EEPROM 1K (128 x 8 or 64 x 16) electronic devices and integrated circuits
electronic integrated circuit
,linear integrated circuits
AT93C46DN-SH-B Three-wire Serial EEPROM 1K (128 x 8 or 64 x 16)
electronic devices and integrated circuits
Features
• Low-voltage and Standard-voltage Operation
– 1.8 (VCC = 1.8V to 5.5V)
• User-selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
• Three-wire Serial Interface
• 2 MHz Clock Rate (5V)
• Self-timed Write Cycle (5 ms max)
• High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
• 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin mini-MAP (MLP 2x3), 8-lead TSSOP and 8-ball dBGA2 Packages • Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers
Description
The AT93C46D provides 1024 bits of serial electrically erasable programmable readonly memory (EEPROM), organized as 64 words of 16 bits each (when the ORG pin is connected to VCC), and 128 words of 8 bits each (when the ORG pin is tied to ground). The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. The AT93C46D is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin miniMAP (MLP 2x3), 8-lead TSSOP, and 8-lead dBGA2 packages.
The AT93C46D is enabled through the Chip Select pin (CS) and accessed via a three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the data is clocked out serially on the DO pin. The Write cycle is completely self-timed, and no separate Erase cycle is required before Write. The Write cycle is only enabled when the part is in the Erase/Write Enable state. When CS is brought high following the initiation of a Write cycle, the DO pin outputs the Ready/Busy status of the part.
3. Timing Diagrams
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