MC14584BDR2G Electronics Circuit Board Programmed Integrated Semiconductor
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MC14584BDR2G Electronics Circuit Board Programmed Integrated Semiconductor
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MC14584B
Hex Schmitt Trigger
The MC14584B Hex Schmitt Trigger is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. These devices find primary use where low power dissipation and/or high noise immunity is desired. The MC14584B may be used in place of the MC14069UB hex inverter for enhanced noise immunity to “square up” slowly changing waveforms.
Features
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−power TTL Loads or One Low−power Schottky TTL Load over the Rated Temperature Range
• Double Diode Protection on All Inputs
• Can Be Used to Replace MC14069UB
• For Greater Hysteresis, Use MC14106B which is Pin−for−Pin Replacement for CD40106B and MM74Cl4
• Pb−Free Packages are Available
MAXIMUM RATINGS (Voltages Referenced to VSS)
| Symbol | Parameter | Value | Unit |
| VDD | DC Supply Voltage Range | −0.5 to +18.0 | V |
| Vin, Vout | Input or Output Voltage Range (DC or Transient) | −0.5 to VDD + 0.5 | V |
| Iin, Iout | Input or Output Current (DC or Transient) per Pin | ±10 | mA |
| PD | Power Dissipation, per Package (Note 1) | 500 | mW |
| TA | Ambient Temperature Range | −55 to +125 | °C |
| Tstg | Storage Temperature Range | −65 to +150 | °C |
| TL | Lead Temperature (8−Second Soldering) | 260 | °C |
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/°C From 65°C To 125°C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.
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