8M Bit Flash Memory Ic Chip WINBOND W25Q80DVSSIG SOIC-8 SPI Serial Flash Interface
serial flash memory
,serial flash chip
Serial Flash Memory Chip IC WINBOND W25Q80DVSSIG SOIC-8 8M bit with Dual/Quad SPI
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PACKAGE TYPE |
DENSITY |
PRODUCT NUMBER |
TOP SIDE MARKING |
|
SN SOIC-8 150mil |
8M-bit |
W25Q80DVSNIG |
25Q80DVNIG |
|
SS SOIC-8 208mil |
8M-bit |
W25Q80DVSSIG |
25Q80DVSIG |
|
SV VSOP-8 150mil |
8M-bit |
W25Q80DVSVIG |
25Q80DVVIG |
|
ZP(1) WSON-8 6x5mm |
8M-bit |
W25Q80DVZPIG |
25Q80DVIG |
|
UX USON-8 2x3x0.6(max.)mm3 |
8M-bit |
W25Q80DVUXIE(3) |
8Nyww(4) 0Exxxx |
|
DA PDIP-8 300mil |
8M-bit |
W25Q80DVDAIG |
25Q80DVAIG |
|
BY WLCSP-8 |
8M-bit |
W25Q80DVBYIG |
3CD(5) Xx |
The W25Q80DV (8M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 1μA for power-down. All devices are offered in space-saving packages.
The W25Q80DV array is organized into 4,096 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q80DV has 256 erasable sectors and 16 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage.
The W25Q80DV supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. A Hold pin, Write Protect pin and programmable write protection, with top, bottom or complement array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification with a 64-bit Unique Serial Number.
Family of SpiFlash Memories
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PIN NO. |
PIN NAME |
I/O |
FUNCTION |
|
1 |
/CS |
I |
Chip Select Input |
|
2 |
DO (IO1) |
I/O |
Data Output (Data Input Output 1)*1 |
|
3 |
/WP (IO2) |
I/O |
Write Protect Input ( Data Input Output 2)*2 |
|
4 |
GND |
Ground |
|
|
5 |
DI (IO0) |
I/O |
Data Input (Data Input Output 0)*1 |
|
6 |
CLK |
I |
Serial Clock Input |
|
7 |
/HOLD (IO3) |
I/O |
Hold Input (Data Input Output 3)*2 |
|
8 |
VCC |
Power Supply |
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