TMS320F28335PTPQ Mosfet Power Transistor DSP, DSC Delfino Micrcntrlr

mosfet motor control circuit
,n channel mos field effect transistor
TMS320F28335PTPQ Mosfet Power Transistor DSP, DSC Delfino Micrcntrlr
1 Features
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High-performance static CMOS technology – Up to 150 MHz (6.67-ns cycle time)
– 1.9-V/1.8-V core, 3.3-V I/O design -
High-performance 32-bit CPU (TMS320C28x)
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– IEEE 754 single-precision Floating-Point Unit
(FPU) (F2833x only)
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– 16 × 16 and 32 × 32 MAC operations
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– 16×16dualMAC
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– Harvard bus architecture
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– Fast interrupt response and processing
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– Unified memory programming model
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– Code-efficient (in C/C++ and Assembly)
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Six-channel DMA controller (for ADC, McBSP, ePWM, XINTF, and SARAM)
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16-bit or 32-bit External Interface (XINTF) – More than 2M × 16 address reach
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On-chip memory
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– F28335, F28333, F28235:
256K × 16 flash, 34K × 16 SARAM
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– F28334, F28234:
128K × 16 flash, 34K × 16 SARAM
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– F28332, F28232:
64K × 16 flash, 26K × 16 SARAM
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– 1K×16OTPROM
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Boot ROM (8K × 16)
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– With software boot modes (through SCI, SPI,
CAN, I2C, McBSP, XINTF, and parallel I/O)
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– Standard math tables
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Clock and system control – On-chip oscillator
– Watchdog timer module -
GPIO0 to GPIO63 pins can be connected to one of the eight external core interrupts
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Peripheral Interrupt Expansion (PIE) block that supports all 58 peripheral interrupts
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128-bit security key/lock
– Protects flash/OTP/RAM blocks
– Prevents firmware reverse-engineering
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• Enhanced control peripherals
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– Up to 18 PWM outputs
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– Up to 6 HRPWM outputs with 150-ps MEP
resolution
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– Up to 6 event capture inputs
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– Up to 2 Quadrature Encoder interfaces
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– Up to 8 32-bit timers
(6 for eCAPs and 2 for eQEPs)
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– Up to 9 16-bit timers
(6 for ePWMs and 3 XINTCTRs) • Three 32-bit CPU timers
• Serial port peripherals– Up to 2 CAN modules
– Up to 3 SCI (UART) modules
– Up to 2 McBSP modules (configurable as SPI) – One SPI module
– One Inter-Integrated Circuit (I2C) bus• 12-bit ADC, 16 channels
– 80-ns conversion rate
– 2 × 8 channel input multiplexer
– Two sample-and-hold
– Single/simultaneous conversions – Internal or external reference• Up to 88 individually programmable, multiplexed GPIO pins with input filtering
• JTAG boundary scan support
– IEEE Standard 1149.1-1990 Standard TestAccess Port and Boundary Scan Architecture • Advanced emulation features
– Analysis and breakpoint functions
– Real-time debug using hardware • Development support includes
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– ANSI C/C++ compiler/assembler/linker
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– Code Composer StudioTM IDE
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– DSP/BIOSTM and SYS/BIOS
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– Digital motor control and digital power software
libraries
• Low-power modes and power savings– IDLE, STANDBY, HALT modes supported
– Disable individual peripheral clocks • Endianness: Little endian