SN74LVC2G08YZPR Programmable Logic ICS Logic Gates Dual 2-Input Pos
SN74LVC2G08YZPR Programmable Logic ICS Logic Gates Dual 2-Input Pos
1 Features
- Available in the Texas Instruments NanoStarTM and NanoFreeTM Package
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Supports 5-V VCC Operation
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Inputs Accept Voltages to 5.5 V
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Maxtpd of4.7nsat3.3V
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Low Power Consumption, 10-μA Maximum ICC
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±24-mA Output Drive at 3.3 V
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Typical VOLP (Output Ground Bounce) <0.8VatVCC =3.3V,TA =25°C
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Typical VOHV (Output VOH Undershoot) >2VatVCC =3.3V,TA =25°C
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Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
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Can Be Used as a Down Translator to Translate Inputs From a Maximum of 5.5 V Down to the VCC Level
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Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
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ESD Protection Exceeds JESD 22
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– 2000-V Human Body Model (A114-A)
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– 1000-V Charged-Device Model (C101)
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2 Applications
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IP Phones: Wired and Wireless
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Optical Networking: EPON and Video Over Fiber
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Point-to-Point Microwave Backhaul
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Power: Telecom DC/DC Module: Analog
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Power: Telecom DC/DC Module: Digital
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Private Branch Exchange (PBX)
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Telecom Shelter: Power Distribution Unit (PDU)
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Vector Signal Analyzers and Generators
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Wireless Communications Testers
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Wireless Repeaters
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xDSL Modem/DSLAM
3 Description
This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G08 device performs the Boolean function Y = A x B or Y = A + B in positive logic.
NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Device Information
|
PART NUMBER |
PACKAGE |
BODY SIZE (NOM) |
|
SN74LVC2G08DCT |
SM8 (8) |
2.95 mm × 2.80 mm |
|
SN74LVC2G08DCU |
VSSOP (8) |
2.30 mm × 2.00 mm |
|
SN74LVC2G08YZP |
DSBGA (8) |
1.91 mm × 0.91 mm |
| Image | Part # | Description | |
|---|---|---|---|
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