SN74LVC2G08YZPR Programmable Logic ICS Logic Gates Dual 2-Input Pos
SN74LVC2G08YZPR Programmable Logic ICS Logic Gates Dual 2-Input Pos
1 Features
- Available in the Texas Instruments NanoStarTM and NanoFreeTM Package
-
Supports 5-V VCC Operation
-
Inputs Accept Voltages to 5.5 V
-
Maxtpd of4.7nsat3.3V
-
Low Power Consumption, 10-μA Maximum ICC
-
±24-mA Output Drive at 3.3 V
-
Typical VOLP (Output Ground Bounce) <0.8VatVCC =3.3V,TA =25°C
-
Typical VOHV (Output VOH Undershoot) >2VatVCC =3.3V,TA =25°C
-
Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
-
Can Be Used as a Down Translator to Translate Inputs From a Maximum of 5.5 V Down to the VCC Level
-
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
-
ESD Protection Exceeds JESD 22
-
– 2000-V Human Body Model (A114-A)
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– 1000-V Charged-Device Model (C101)
-
2 Applications
-
IP Phones: Wired and Wireless
-
Optical Networking: EPON and Video Over Fiber
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Point-to-Point Microwave Backhaul
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Power: Telecom DC/DC Module: Analog
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Power: Telecom DC/DC Module: Digital
-
Private Branch Exchange (PBX)
-
Telecom Shelter: Power Distribution Unit (PDU)
-
Vector Signal Analyzers and Generators
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Wireless Communications Testers
-
Wireless Repeaters
-
xDSL Modem/DSLAM
3 Description
This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G08 device performs the Boolean function Y = A x B or Y = A + B in positive logic.
NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Device Information
|
PART NUMBER |
PACKAGE |
BODY SIZE (NOM) |
|
SN74LVC2G08DCT |
SM8 (8) |
2.95 mm × 2.80 mm |
|
SN74LVC2G08DCU |
VSSOP (8) |
2.30 mm × 2.00 mm |
|
SN74LVC2G08YZP |
DSBGA (8) |
1.91 mm × 0.91 mm |
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