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Home > Products > Flash Memory IC Chip > TXS0102DCUR Two Bit Non Inverting Integrated Circuit Chip Partial Power Down Mode Operation

TXS0102DCUR Two Bit Non Inverting Integrated Circuit Chip Partial Power Down Mode Operation

Voltage Level Translator Bidirectional 1 Circuit 2 Channel 24Mbps 8-VSSOP
Flash Memory IC Chip
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Supply Voltage - Min:
1.65 V
Supply Voltage - Max:
3.6 V
Minimum Operating Temperature:
- 40 C
Maximum Operating Temperature:
+ 85 C
Logic ICs
Unit Weight:
0.000339 Oz
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logic integrated circuits


programmable logic array ic


TXS0102DCUR Programmable Logic ICS Voltage Levels 2-Bit Bi-Directional Voltage-Level-Trans


1 Features

  • No Direction-Control Signal Needed
  • Maximum Data Rates
  • – 24 Mbps (Push Pull)
  • – 2 Mbps (Open Drain)
  • Available in the Texas Instruments NanoStarTM Package
  • 1.65Vto3.6VonAPortand2.3Vto5.5VonB Port (VCCA ≤ VCCB)
  • VCC Isolation Feature: If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • No Power-Supply Sequencing Required: Either VCCA or VCCB Can Be Ramped First
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II


2 Applications

  • I2C / SMBus

  • UART

  • GPIO


3 Description

This two-bit non-inverting translator is a bidirectional voltage-level translator and can be used to establish digital switching compatibility between mixed-voltage systems. It uses two separate configurable power- supply rails, with the A ports supporting operating voltages from 1.65 V to 3.6 V while it tracks the VCCA supply, and the B ports supporting operating voltages from 2.3 V to 5.5 V while it tracks the VCCB supply. This allows the support of both lower and higher logic signal levels while providing bidirectional translation capabilities between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all I/Os are placed in the high-impedance state, which significantly reduces the power-supply quiescent current consumption.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Device Information

TXS0102DCT SSOP (8) 2.95 mm × 2.80 mm
TXS0102DCU VSSOP (8) 2.30 mm × 2.00 mm
TXS0102DQE X2SON (8) 1.40 mm × 1.00 mm
TXS0102DQM X2SON (8) 1.80 mm × 1.20 mm
TXS0102YZP DSBGA (8) 1.90 mm × 0.90 mm
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