TPS3897PDRYR Power Path Management IC Supervisory Circuits Sgl Ch,Ultra Small Adj Sup Circuit

• FPGAs and ASICs

3 Description

The TPS3895, TPS3896, TPS3897, and TPS3898 devices (TPS389x) are a family of very small supervisory circuits that monitor voltages greater than 500 mV with a 0.25% (typical) threshold accuracy and offer adjustable delay time using external capacitors. The TPS389x family also has a logic enable pin (ENABLE or ENABLE) to power on and off the output. With the TPS3895, for example, when the input voltage pin (SENSE) rises above the threshold, and the ENABLE pin is high, then the output pin (SENSE_OUT) goes high after the capacitor- adjustable delay time. When SENSE falls below the threshold or ENABLE is low, then SENSE_OUT goes low. For truth tables, see Table 1 and Table 2.

For TPS389xA versions, both SENSE and ENABLE have a capacitor-adjustable delay. The output asserts after this capacitor-adjustable delay when both SENSE and ENABLE inputs are good. The TPS389xP devices have a small, 0.2-μs propagation delay from when the enable pin asserts to when the output pin asserts, provided SENSE is above the threshold.

All devices operate from 1.7 V to 6.5 V and have a typical quiescent current of 6 μA with an open-drain output rated at 18 V. The TPS389x is available in an ultra-small USON package and is fully specified over the temperature range of TJ = –40°C to 125°C.

Device Information