SOP16 Serial In Serial Out Parallel Out 8 Bit Shift Register 74HC595
Parallel Out 8 Bit Shift Register
,8 Bit Shift Register 74HC595
,SOP16 Parallel Out Shift Register
74HC595D SOP16 74HC595 spo SN74HC595DT SMD IC
SN74HC595D SOP16 74HC595D 74HC595 SN74HC595DR SMD logika IC oryginał
74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output
latches; 3-state
74HC595BQ,115 74HC595D,112 74HC595DB,112 74HC595DB,118 74HC595D,118 74HC595N,112
74HC595PW,112 74HC595PW,118 74HCT595BQ,115 74HCT595D,112 74HCT595DB,112 74HCT595DB,118
74HCT595D,118 74HCT595N,112 74HCT595PW,112 74HCT595PW,118 74HC595PW/AUJ
The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage
register and 3-state outputs. Both the shift and storage register have separate clocks. The device
features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous
reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH
transitions of the SHCP input. The data in the shift register is transferred to the storage register
on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift
register will always be one clock pulse ahead of the storage register. Data in the storage register
appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the
outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the
state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors
to interface inputs to voltages in excess of VCC.
Features
Wide supply voltage range from 2.0 to 6.0 V
• CMOS low power dissipation
• High noise immunity
• 8-bit serial input
• 8-bit serial or parallel output
• Storage register with 3-state outputs
• Shift register with direct clear
• 100 MHz (typical) shift out frequency
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards:
• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)
• Input levels:
• For 74HC595: CMOS level
• For 74HCT595: TTL level
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Multiple package options
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Applications
Serial-to-parallel data conversion
• Remote control holding register
Ordering information
| Type number | Name | Description | Version |
| 74HC595D | SO16 | plastic small outline package; 16 leads; body width 3.9 mm |
SOT109-1 |
| 74HCT595D | SO16 | plastic small outline package; 16 leads; body width 3.9 mm |
SOT109-1 |
| 74HC595PW | TSSOP16 | plastic thin shrink small outline package; 16 leads; body width 4.4 mm |
SOT403-1 |
| 74HCT595PW | TSSOP16 | plastic thin shrink small outline package; 16 leads; body width 4.4 mm |
SOT403-1 |
| 74HC595BQ | DHVQFN16 | plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm |
SOT763-1 |
| 74HCT595BQ | DHVQFN16 | plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm |
SOT763-1 |
| 74HC595BZ | DHXQFN16 | plastic, leadless dual in-line compatible thermal enhanced extreme thin quad flat package; no leads; 16 terminals; 0.4 mm pitch; body 2 mm × 2.4 mm × 0.48 mm |
SOT8016-1 |
| Shipment |
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