TPS650940A0RSKR Power Path Management IC PMIC ETNA PG 1.0 - APOLLO PLATFORM

TPS650940A0RSKR Power Path Management IC PMIC ETNA PG 1.0 - APOLLO PLATFORM

1 Features

• WideVIN rangefrom5.6Vto21V

• Three variable-output voltage synchronous

  Step-down controllers With D-CAP2TM Topology

  • – 5 A for BUCK1 (VNN), 7 A for BUCK6 (VDDQ),

    and 21 A for BUCK2 (VCCGI) using external

    FETs for typical applications

  • – I2C Dynamic Voltage Scaling (DVS) control

    (0.5 V to 1.45 V in 10-mV Steps) for BUCK1 and

    BUCK2

  • – OTP-Programmable default output voltage for

    BUCK6 (VDDQ)

• Three variable-output voltage synchronous

  Step-down converters with dcs-control topology and I2C DVS capabilities
  – VIN rangefrom4.5Vto5.5V
  – 3 A of output current for BUCK3 (VCCRAM) – 2 A of output current for BUCK4 (V1P8A) and

   

2 Applications

• 2-, 3-, or 4-Series cell li-ion battery-powered products (NVDC or Non-NVDC)

• Wall-powered designs, particularly from 12-V supply

  • VTT LDO for DDR memory termination
  • Three load switches with slew rate control

  – Up to 400 mA of output current with voltage drop less than 1.5% of nominal input voltage

  – RDSON < 96 mΩ at input voltage of 1.8 V
  • I2C Interface (device address 0x5E) supports:

  – Standard mode (100 kHz) – Fast mode (400 kHz)
  – Fast mode plus (1 MHz)

  • Tablets, UltrabookTM, and notebook computers • Mobile PCs and mobile internet devices

3 Description

The TPS65094 device is a single-chip solution, power-management integrated chip (PMIC) designed specifically for the latest IntelTM processors targeted for tablets, ultrabooks, notebooks, industrial PCs, and Internet-of-Things (IOT) applications using 2S, 3S, or 4S Li-Ion battery packs (NVDC or non-NVDC power architectures), as well as wall-powered applications. The TPS65094 device is used for essential systems with low-voltage rails merged for the smallest footprint and lowest-cost system-power solution. The TPS65094 device provides the complete power solution based on the Intel Reference Designs. Six highly efficient step-down voltage regulators (VRs), a sink or source LDO (VTT), and a load switch are controlled by power-up sequence logic to provide the proper power rails, sequencing, and protection—including DDR3 and DDR4 memory power. The two regulators (BUCK1 and BUCK2) support dynamic voltage scaling (DVS) for maximum efficiency—including support for Connected Standby. The high-frequency VRs use small inductors and capacitors to achieve a small solution size. An I2C interface allows simple control by an embedded controller (EC) or by a system on chip (SoC).

The PMIC comes in an 8-mm × 8-mm single-row VQFN package with a thermal pad for good thermal dissipation and ease of board routing.

Device Information