SN74LVTH245ADWR Electronic IC Chips OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

SN54LVTH245A, SN74LVTH245A

3.3-V ABT OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

• Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
  
• Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
  
• Support Unregulated Battery Operation Down to 2.7 V
  
• I_off and Power-Up 3-State Support Hot Insertion
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 500 mA Per JESD 17
• ESD Protection Exceeds JESD 22
  • − 2000-V Human-Body Model (A114-A)
  • − 200-V Machine Model (A115-A)

description

These octal bus transceivers are designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are designed for asynchronous communication between data buses. They transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the devices so the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

absolute maximum ratings over operating free-air temperature range

(unless otherwise noted)†

Supply voltage range, V_CC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

Input voltage range, V_I (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V

Voltage range applied to any output in the high-impedance

    or power-off state, V_O (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V

Voltage range applied to any output in the high state, V_O (see Note 1)  . . . . . . . . −0.5 V to V_CC + 0.5 V

Current into any output in the low state, I_O: SN54LVTH245A  . . . . . . . . . . . . . . . . . . 96 mA

                                                                    SN74LVTH245A  . . . . . . . . . . . . . . . . . . .128 mA

Current into any output in the high state, I_O (see Note 2): SN54LVTH245A . . . . . . . . . 48 mA

                                                                                          SN74LVTH245A  . . . . . . . . . 64 mA

Input clamp current, I_IK (V_I < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA 

Output clamp current, I_OK (V_O < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA

Package thermal impedance, θ_JA (see Note 3): DB package  . . . . . . . . . . . . . . . . . . . . 70°C/W

                                                     (see Note 3): DW package  . . . . . . . . . . . . . . . . . . . . 58°C/W

                                                     (see Note 3): GQN/ZQN package  . . . . . . . . . . . . . . . 78°C/W

                                                     (see Note 3): NS package  . . . . . . . . . . . . . . . . . . . . . 60°C/W

                                                     (see Note 3): PW package  . . . . . . . . . . . . . . . . . . . . . 83°C/W

                                                     (see Note 4): RGY package  . . . . . . . . . . . . . . . . . . . . 37°C/W

Storage temperature range, Tstg  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. This current flows only when the output is in the high state and V_O > V_CC.

3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5.

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