PIC18F2320-I/SP Integrated Circuit Chip Enhanced Flash Microcontrollers

PIC18F2220/2320/4220/4320

28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers

with 10-Bit A/D and nanoWatt Technology

Low-Power Features:

• Power Managed modes:

  - Run: CPU on, peripherals on

  - Idle: CPU off, peripherals on

  - Sleep: CPU off, peripherals off

• Power Consumption modes:

  - PRI_RUN: 150 µA, 1 MHz, 2V

  - PRI_IDLE: 37 µA, 1 MHz, 2V

  - SEC_RUN: 14 µA, 32 kHz, 2V

  - SEC_IDLE: 5.8 µA, 32 kHz, 2V

  - RC_RUN: 110 µA, 1 MHz, 2V

  - RC_IDLE: 52 µA, 1 MHz, 2V

  - Sleep: 0.1 µA, 1 MHz, 2V

• Timer1 Oscillator: 1.1 µA, 32 kHz, 2V

• Watchdog Timer: 2.1 µA

• Two-Speed Oscillator Start-up

Oscillators:

• Four Crystal modes:

  - LP, XT, HS: up to 25 MHz

  - HSPLL: 4-10 MHz (16-40 MHz internal)

• Two External RC modes, up to 4 MHz

• Two External Clock modes, up to 40 MHz

• Internal oscillator block:

  - 8 user selectable frequencies: 31 kHz, 125 kHz, 250 kHz, 500 kHz, 1 MHz, 2 MHz, 4 MHz, 8 MHz

  - 125 kHz-8 MHz calibrated to 1%

  - Two modes select one or two I/O pins

  - OSCTUNE – Allows user to shift frequency

• Secondary oscillator using Timer1 @ 32 kHz

• Fail-Safe Clock Monitor

  - Allows for safe shutdown if peripheral clock stops

Peripheral Highlights:

• High current sink/source 25 mA/25 mA

• Three external interrupts

• Up to 2 Capture/Compare/PWM (CCP) modules:

  - Capture is 16-bit, max. resolution is 6.25 ns (TCY/16)

  - Compare is 16-bit, max. resolution is 100 ns (TCY)

  - PWM output: PWM resolution is 1 to 10-bit

• Enhanced Capture/Compare/PWM (ECCP) module:

  - One, two or four PWM outputs

  - Selectable polarity

  - Programmable dead-time

  - Auto-Shutdown and Auto-Restart

• Compatible 10-bit, up to 13-channel Analog-to-Digital Converter module (A/D)

   with programmable acquisition time

• Dual analog comparators

• Addressable USART module:

  - RS-232 operation using internal oscillator block (no external crystal required)

Special Microcontroller Features:

• 100,000 erase/write cycle Enhanced Flash program memory typical

• 1,000,000 erase/write cycle Data EEPROM memory typical

• Flash/Data EEPROM Retention: > 40 years

• Self-programmable under software control

• Priority levels for interrupts

• 8 x 8 Single-Cycle Hardware Multiplier

• Extended Watchdog Timer (WDT):

  - Programmable period from 41 ms to 131s

  - 2% stability over VDD and Temperature

• Single-supply 5V In-Circuit Serial Programming™ (ICSP™) via two pins

• In-Circuit Debug (ICD) via two pins

• Wide operating voltage range: 2.0V to 5.5V

Absolute Maximum Ratings (†)

Ambient temperature under bias.............................................................................-55°C to +125°C

Storage temperature ............................................................................................. -65°C to +150°C Voltage on any pin with respect to V_SS (except V_DD, MCLR and RA4) ........... -0.3V to (V_DD + 0.3V)

Voltage on V_DD with respect to V_SS ........................................................................... -0.3V to +7.5V

Voltage on MCLR with respect to V_SS (Note 2) .......................................................... 0V to +13.25V

Voltage on RA4 with respect to V_SS ............................................................................... 0V to +8.5V

Total power dissipation (Note 1) ...............................................................................................1.0W

Maximum current out of V_SS pin ............................................................................................300 mA

Maximum current into V_DD pin ...............................................................................................250 mA

Input clamp current, I_IK (V_I < 0 or V_I > V_DD)........................................................................... ±20 mA

Output clamp current, I_OK (V_O < 0 or V_O > V_DD).................................................................... ±20 mA

Maximum output current sunk by any I/O pin.............................................................................25 mA

Maximum output current sourced by any I/O pin .......................................................................25 mA

Maximum current sunk by all ports ..........................................................................................200 mA

Maximum current sourced by all ports .....................................................................................200 mA

Note

1: Power dissipation is calculated as follows:

    Pdis = VDD x {IDD - ∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOl x IOL)

2: Voltage spikes below VSS at the MCLR/VPP pin, inducing currents greater than 80 mA, may cause latch-up. Thus, a series resistor of 50-100Ω should be used when applying a “low” level to the MCLR/VPP pin, rather than pulling this pin directly to VSS.

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

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